3D-Integration Technology (FY2008-2012)

The project's aim is to develop "Functionally Innovative Three-dimensional Integrated Circuit (Dream Chip)" technology that overcoms the limits of semiconductor scaling. This technology will realize very high-speed and low power consumption chips that use a through-silicon via (TSV). It will be "High-density Three-dimensional Integration Technology for Multi-functional Devices" satisfying the specifications needed for its assumed practical applications. It is to be developed until 2012, the project's final year. The development themes will be the following common basic technologies of 3D integration:

(1)Cooling and Stacking / Bonding Technology
(2)Thin Wafer Technology
(3)3D Integration Technology
(4)Ultra-wide Bus SiP 3D Integration Technology
(5)Digital and Analog 3D Integration Technology
(6)Heterogeneous 3D Integration Technology

The project will demonstrate the functions and practical effectiveness of the developed chip through producing a 3D Integration SiP prototype utilizing the developed integration technology. (NEDO Contract Research)